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数字电路中的冗余故障会导致电路面积、延迟、功耗的增加,而且对于多个固定型故障,如果多个故障中的一个是冗余的,则冗余故障的出现可能屏蔽其他可测试故障的存在,而冗余故障却不能被传统测试方法检测出。如果能够找到某种检测冗余故障的有效方法,那将会对提高电路性能产生积极作用。本文则详细对数字电路冗余故障测试产生算法进行了研究。
Redundant faults in digital circuits can lead to increased circuit area, delay, and power consumption, and for multiple fixed faults, if one of the multiple faults is redundant, the appearance of a redundant fault may mask other testable The existence of faults, and redundant faults can not be detected by the traditional test methods. If you can find some effective way to detect redundant faults, that will have a positive effect on improving the circuit’s performance. This article is a detailed study of digital circuit redundancy fault test generation algorithm.