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在常规高速采样保持电路(SHC)中,采样速率主要受到保持电容器被充电到输入电平期间的采集时间的限制。本文描述一种新的电路结构,其采样速率仅仅由保持时间决定。就时钟馈通而言,这个SHC本身相当于一个虚拟开关补偿的SHC。
In conventional high speed sample and hold circuits (SHCs), the sampling rate is primarily limited by the acquisition time during which the hold capacitor is charged to the input level. This article describes a new circuit structure, the sampling rate is only determined by the retention time. In terms of clock feedthrough, this SHC itself is equivalent to a SHC with virtual switch compensation.