逻辑验证和逻辑综合中 ,利用对称变量的性质能提高算法整体的效率 .通常 fxixj=fxjxi被用来检验变量的对称性 .一般先分别建立 fxixj和 fxjxi的 BDD( Binary Decision Diagram)二分决策图 ,然后通过检查两 BDD图是否同构来验证 fxixj=fxjxi.但将电路转化为 BDD图本身就需要一定的时间 ,而且对于大的电路 ,存在 BDD图不能建立的可能性 ,致使同构验证无法进行 .本文利用递归学习 ,无需建立 BDD图直接在电路拓扑图上验证 fxixj=fxjxi.递归学习算法执行效率高 ,可以大大缩减对称变量检测的过程 .试验结果表明 ,利用递归学习算法检测对称变量执行时间减少 ,并且能将大的电路作为检测对象 . In logic verification and logic synthesis, the use of the nature of symmetric variables can improve the overall efficiency of the algorithm.Usually fxixj = fxjxi is used to test the symmetry of the variables.Firstly, BDD (fxixj) and fxjxi Binary Decision Diagram), and then verify fxixj = fxjxi by checking whether the two BDD graphs are isomorphic. However, converting a circuit to a BDD graph itself takes time, and for large circuits there is a BDD graph Can not be established, resulting in isomorphism verification can not be carried out.In this paper, using recursive learning, without establishing a BDD map directly verify the circuit topology fxixj = fxjxi. Recursive learning algorithm implementation of high efficiency, can greatly reduce the symmetrical variable detection The experimental results show that the use of recursive learning algorithm to detect symmetrical variables to reduce the execution time, and can be a large circuit as a test object.