基于高速串行通信系统中锁相环和时钟数据恢复电路的需求,研究了前馈环形振荡器的结构与工作原理;在传统结构的基础上,将前馈路径......

A low jitter All-Digital Phase-Locked Loop(ADPLL) used as a clock generator is designed.The Digital-Controlled Oscillato......