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图中的电路是一种用来减小乃至增除双极输入级运算放大器偏流的方法。该方法简单适用,但最好制作在多级运算放大器芯片上,并采用一个运算放大器作为浮动的变换器来减小运算放大器的偏流。该方案取决于一前提,即输入到一个多级运算放大器芯片所有输入端的电流是匹配的——这对于制造在同一芯片上的双极PNP输入级单元来说,是合理的设想。如图所示,由于所有输入电流匹配,并且R_2等于2R_1,R_1内的电流量就为R_2内电流的二倍,因此2I_B的一半来自于A_1,而A_2充当了吸收电流I_B的浮动电流变换器的作用,该电流等于A_1的偏置电流。
The circuit in the figure is a way to reduce or even boost the bias current of a bipolar input stage op amp. This method is simple to apply, but it is best to make it on a multi-stage op amp chip and use an op amp as a floating converter to reduce the op amp bias current. The solution is based on the premise that the current input to all inputs of a multi-stage op amp chip matches - this is a reasonable assumption for making bipolar PNP input stage cells on the same chip. Since all input currents match and R_2 is equal to 2R_1, the amount of current in R_1 is twice the current in R_2 as shown, so half of 2I_B comes from A_1 and A_2 acts as a floating current transformer that sinks the current I_B The current is equal to the bias current of A_1.