一、作用为了提高数字锁相环的相位调整精度,可以在通常的数字环中加上时序环路滤波器(Sequential loop filter)。图1为加有时序环路滤波器的数字锁相环。二进制鉴相器比较钟脉冲与收码的相位,其输出为二进制随机序列。钟脉冲的相位超前于收码时,鉴相器输出超前脉冲;钟脉冲落后于收码时,鉴相器输出落后脉冲。当收码的信噪比较高,收发的晶振也很稳定时,收码相对于钟脉冲的相位抖动可以忽略,此时超前和落后的输出脉冲如图2所示。直接用鉴相器的输出作为控制脉冲在晶振输出脉冲序列中附加或减去一脉冲即 First, the role In order to improve the digital phase-locked loop phase adjustment accuracy, you can add in the usual digital ring sequential loop filter (Sequential loop filter). Figure 1 is a digital phase-locked loop with a timing loop filter. The binary phase comparator compares the phase of the clock pulse with the received code, and the output is a binary random sequence. When the phase of the clock pulse is ahead of the receiving clock, the phase detector outputs the leading pulse. When the clock pulse falls behind the receiving clock, the phase detector outputs a backward pulse. When the receiver of the high signal-noise ratio, send and receive crystal is also very stable, the receiver code phase clock jitter relative to the clock pulse can be ignored, this time ahead and behind the output pulse shown in Figure 2. Directly with the output of the phase detector as a control pulse in the crystal output pulse sequence to add or subtract a pulse that