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本文介绍一种与双极IC电路技术完全兼容的低压(CMOS)/高压(VDMOS)器件设计与制备工艺。VDMOS器件阈电压:1～2伏(根据注入剂量调节),漏击穿电压大于150伏。V_(GS)=5V时其跨导大于10m(?),导通电阻小于200Ω,最大输出电流约800mA。同时得到的NPN器件其β≥250,BV_(ceo)≥65V,BV_(CBO)≥90V。CMOS器件性能也合乎要求。利用这种工艺可制作任何低压和高压双极/MOS器件,这对于功率集成、高低压转换与驱动、等离子体显示等方面应用会有很多实用价值。
This article presents a design and fabrication process for a low voltage (CMOS) / high voltage (VDMOS) device that is fully compatible with bipolar IC circuitry. VDMOS device threshold voltage: 1 ~ 2 volts (adjusted according to the injection dose), leakage breakdown voltage greater than 150 volts. V_ (GS) = 5V Transconductance greater than 10m (?), On-resistance is less than 200Ω, the maximum output current of about 800mA. At the same time, the obtained NPN device has β≥250, BV_ (ceo) ≥65V and BV_ (CBO) ≥90V. CMOS device performance is also satisfactory. Any low voltage and high voltage bipolar MOS device can be fabricated using this process, which has many practical applications for power integration, high and low voltage conversion and driving, plasma display and other applications.