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基于对TD-LTE无线综合测试仪中DSP与FPGA之间并行数据通信技术的研究与分析,设计了一种基于FPGA的EMIF,可与片内接收模块进行数据传输。DSP在收到中断信号后,将数据通过EMIF传输到FPGA的片内接收模块,两片RAM通过乒乓结构的设计操作,完成对数据的接收。经过仿真、综合、板级验证、联机调试等工作,该设计方案实现了数据的正确传输,已应用于测试仪表的开发。
Based on the research and analysis of parallel data communication between DSP and FPGA in TD-LTE wireless tester, an FPGA based EMIF is designed to transmit data with on-chip receiver module. DSP receives the interrupt signal, the data transmitted to the FPGA through the EMIF on-chip receiver module, two pieces of RAM through the ping-pong structure design and operation, to complete the data received. After simulation, synthesis, board level verification, on-line debugging and other work, the design program to achieve the correct transmission of data has been used in the development of test instrumentation.