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提出了嵌入式微处理器的设计方案；给出了微处理器的虚拟地址空间到物理地址空间的转换算法；详细设计了地址单元的数据通路和控制时序，并用MENTOR工具验证了地址单元的RTL级描述的正确性。
The design scheme of the embedded microprocessor is presented. The conversion algorithm of the virtual address space to the physical address space of the microprocessor is given. The data path and control timing of the address unit are designed in detail. The RTL level of the address unit is verified by the MENTOR tool The correctness of the description.