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目前国内外生产的中小型数字电子计算机普遍采用TTL数字集成电路(包括浅饱和TTL电路和STTL电路),至于百万次以上的大型电子计算机,在国外几乎都采用ECL电路,而在国内则有二类:一类是采用ECL电路;一类是采用TTL电路。有的单位用STTL电路研制了每秒运算几百万次的大型电子计算机。至今为止,STTL电路无论在速度或集成度方面都还有不少潜力可挖,已批量生产的STTL电路级延迟约在6～8毫微秒,集成度是以小规模电路为主。我们在版子设计和工艺条件等方面采取了若干措施,以不增加功耗和少影响成品率为前提,使级延迟缩短至4～5毫微秒,采用相似的版图和工艺条件研制成的STTL中规模集成电路(20～30门/片)级延迟可降至4毫微秒以下,采用这种中规模STTL门电路,可以制造出一千万次以上的超高速大型电子计算机。本文主要介绍STTL双单门的版图考虑和工艺条件。
At present, TTL digital integrated circuits (including shallow saturated TTL circuits and STTL circuits) are widely used in small and medium-sized digital computers at home and abroad. As for large-scale computer with more than 1 million times, almost all foreign ECL circuits are used, while in China there are Two categories: one is the use of ECL circuit; one is the use of TTL circuit. Some units use STTL circuits to develop large-scale computers that operate millions of times per second. So far, STTL circuits have a lot of potential to be found in terms of speed or integration. The mass-produced STTL circuit-level delay is about 6 to 8 nanoseconds, and the integration is based on small-scale circuits. We have taken a number of measures in terms of layout design and process conditions to reduce the level delay to 4-5 nanoseconds without increasing the power consumption and yield without affecting the finished product yield. The products have been developed with similar layout and process conditions STTL scale integrated circuits (20 ~ 30-door / slice) level delay can be reduced to 4 nanoseconds below the use of such a large-scale STTL gate circuit, you can create more than 10 million times the ultra-high-speed large-scale computer. This article describes the STTL double single-door layout considerations and process conditions.