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自偏置锁相环被提出以来,被认为能够以简单的电路结构降低锁相环的环内分频比从而改善环路带宽内的相位噪声。从噪声的相关性出发,分析了信号经过自偏置电路后对相位噪声的影响,并通过计算自偏置锁相环的相位传递函数得到其相位噪声模型,对比于传统单环式锁相环结构,其环内分频比并未降低。通过设计一2.28~2.52GHz的自偏置锁相环,对其相位噪声进行测试并与传统单环和偏置式锁相环进行比较,测试结果也表明自偏置锁相技术并不能降低锁相环的带内相位噪声。
Since the bias phase-locked loop was proposed, it is considered that it is possible to reduce the intra-loop frequency division ratio of the phase-locked loop with a simple circuit structure so as to improve the phase noise within the loop bandwidth. Based on the correlation of the noise, the influence of the self-bias signal on the phase noise is analyzed. The phase noise model is obtained by calculating the phase transfer function of the self-biased PLL. Compared with the traditional single-loop PLL Structure, its ring frequency division ratio did not decrease. By designing a 2.28 ~ 2.52GHz self-bias PLL, the phase noise is tested and compared with the traditional single-loop and bias PLL, the test results also show that self-bias phase-locked technology can not reduce the lock In-band phase noise in the band.