在一些可预置的数字系统中,为了简化电路,常常希望能用一、二个按纽来快速地预置数字。当预置数字位数较多时,用恒速的预置时钟脉冲会感到预置速度太慢,或者预置数字跳动太快而不易置准。本文介绍一种变速时钟发生电路,可以较好 In some presettable digital systems, in order to simplify the circuit, it is often desirable to use one or two buttons to quickly preset numbers. When the preset number of digits is high, the pre-set clock with the constant speed will feel the preset speed too slow, or the preset number may be too fast to be accurately aligned. This article describes a variable speed clock generator circuit can be better