论文部分内容阅读
为了实现不同数制的乘法共享硬件资源,提出了一种可以实现基于IEEE754标准的64位双精度浮点与32位单精度浮点、32位整数和16位定点的多功能阵列乘法器的设计方法。采用超前进位加法和流水线技术实现乘法器性能的提高。设计了与TMS320C6701乘法指令兼容的乘法单元,仿真结果验证了设计方案的正确性。
In order to realize the multiplication and sharing of hardware resources with different numbers, a multi-functional array multiplier that can achieve 64-bit double-precision floating point and 32-bit single-precision floating point, 32-bit integer and 16-bit fixed point based on IEEE754 standard method. Adopting leading carry and pipeline techniques to improve multiplier performance. The multiplication unit compatible with the TMS320C6701 multiplication instruction is designed. The simulation results verify the correctness of the design.