Verification of Systolic Array:An FP Functional Approach

来源 :Journal of Computer Science and Technology | 被引量 : 0次 | 上传用户:hz198119
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There has been much interest in the use of formal techniques for the design and analysis ofsystolic arrays.One important aspect of analysis of systolic array is the correctness problem.A few attempts for the verification of systolic array have appeared in the literature.The deficiency is that all of these methods lack a straightforward way of proving correctness.They need either proposing a solution,then applying inductive techniques or showing that thearray satisfies three types of properties:safety,liveness and termination.In this paper,an FP functional approach is proposed.The goal is to verify that a givensystolie design computes the function for which it was intended,lnstead of the generation of asystolic architecture,the method generates a system of recursive functional equations whichdescribes the algorithm executed by the architecture.This representation consists of severalequations describing processes executed by local cells,equations describing connectionsbetween cells,functions representing data streams,and functions describing the relationbetween the structure of input and output data and the systolic array structures.The minimumsolution of the system of recursive functional equations is the function computed by the systolicarchitecture.The main advantage of this approach is that it allows us to develop an algebra offunctional programs. We have developed various methods to deal with different kinds ofsystems of functional recursive equations.By solving the system of recursive functionalequations,we can get the least solution directly.This provides a straightforward way forproving correctness.An example is given.A typical system of recursive functional equations is generated,which can represent most of systolic design.Algebra method is developed showing how to solvethis problem. There has been much interest in the use of formal techniques for the design and analysis ofsystolic arrays. One important aspect of analysis of systolic array is the correctness problem. A few attempts for the verification of systolic array have appeared in the literature.The deficiency is that all of these methods lack a straightforward way of proving correctness.They need either proposing a solution, then applying inductive techniques or showing that the same thing types of properties: safety, liveness and termination. in this paper, an FP functional approach is proposed The goal is to verify that a givensystolie design computes the function for which it was intended, lnstead of the generation of asystolic architecture, the method generates a system of recursive functional equations whichdescribes the algorithm executed by the architecture.This representation consists of severalequations describing processes executed by local cells, equations describing connectionsbetween cells, funct ions representing data streams, and functions describing the relation between the structure of input and output data and the systolic array structures. minimum solution of the system of recursive functional equations is the function computed by the systolicarchitecture. The main advantage of this approach is that that it allows We have developed various methods to deal with different kinds ofsystems of functional recursive equations.By solving the system of recursive functionalequations, we can get the least solution directly.This provides a straightforward way forproving correctness.An example is given. A typical system of recursive functional equations is generated, which can represent the most of systolic design. Algebra method is developed showing how to solve problem.
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