本文介绍一种科学用高速并行计算机的线路。这些线路传送讯号的延迟时间小于5毫微秒;其脉冲宽度为5毫微秒。每级线路的平均功率损耗为25毫瓦。采用本文所提出的装配方案可以获得每立方呎超过10000个线路的装配密度。利用这些线路可以设计一个字长64位的计算机,其加,减,乘,除,移位等操作的平均重复频率为 This article describes a line of high-speed parallel computers for science. These lines transmit signals with a delay time of less than 5 nanoseconds; their pulse width is 5 nanoseconds. The average power loss per line is 25 milliwatts. Using the assembly scheme presented in this paper, an assembly density of over 10,000 lines per cubic foot can be obtained. The use of these lines can design a 64-word computer, the addition, subtraction, multiplication, division, shift and other operations of the average repetition frequency of