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数值缩放的高效VLSI实现是余数系统(RNS)应用于数字信号处理(DSP)系统中的关键问题之一.文中首先提出了有符号余数系统数值缩放通用算法,明确给出了在负数情况时修正常量的计算方法.在此基础上给出了一种有符号余数系统2n缩放的高效实现方法,该方法利用中国剩余定理和一个较小的冗余基实现基扩展以获取RNS整数的低n比特信息,并借助所引入的冗余基用奇偶检测完成RNS整数的符号检测,同时还提出了冗余基更新方法及负数情况下冗余通道修正常量计算方法.分析结果表明所提出的RNS数值缩放方法的复杂度仅同RNS的动态范围位宽呈线性关系,并避免了使用查找表(LUT).最后,完成了此方法和基于串行方式的2n缩放算法的VLSI实现,在相同约束条件下该方法的面积和功耗均减小了35%左右,而关键路径延时则减小了12%左右,VLSI版图也表明了该方法具有更简单的芯片内联结构.
Efficient VLSI implementation of scaling is one of the key issues in applying the Residuals System (RNS) to digital signal processing (DSP) systems.In this paper, a general algorithm for scaling the signed residue systems is proposed, A method for calculating the constant of 2n is proposed.An efficient method for scaling 2n of signed residue systems is proposed.It uses the Chinese Remainder Theorem and a small redundant base to achieve base expansion to get the low n bits of RNS integer Information and detect the sign of RNS integers by parity detection with the introduced redundant basis.At the same time, the method of redundant base updating and the method of calculating the correction parameters of redundant channels in negative case are proposed.The analysis results show that the proposed RNS numerical scaling The complexity of the method is only linear with the dynamic range of the RNS, and avoids the use of look-up table (LUT) .Finally, the VLSI implementation of this method and the 2n scaling algorithm based on serial mode is completed. Under the same constraints This method reduces the area and the power consumption by about 35%, while the critical path delay is reduced by about 12%. The VLSI layout also shows that this method has a simpler in-chip Structure.