针对衬底辅助耗尽效应降低常规super junction LDMOS(SJ-LDMOS)击穿电压的不足,提出了一种新的具有部分n埋层的高压SJ-LDMOS器件结构.通过该部分n埋层,不仅补偿了由于衬底辅助效应所致的电荷不平衡现象,实现了高的击穿电压,而且该埋层在器件正向导通时为电流提供了辅助通道,减小了器件导通电阻.分析了器件结构参数和参杂对器件击穿电压和导通电阻的影响,结果表明文中所提出的新结构具有高的击穿电压、低的导通电阻以及较好的工艺容差等特性.此外,该结构与智能功率集成技术兼容. In order to reduce the breakdown voltage of the conventional super junction LDMOS (SJ-LDMOS), a new high-voltage SJ-LDMOS device structure with partial n-buried layer is proposed for the substrate-assisted depletion effect. Compensates for the charge imbalance caused by the substrate assist effect and achieves a high breakdown voltage, and the buried layer provides an auxiliary channel for the current when the device is conducting in the forward direction, reducing the on-resistance of the device. The results show that the new structure proposed in this paper has the characteristics of high breakdown voltage, low on-resistance and good process tolerance etc. In addition, the breakdown voltage and on- This structure is compatible with smart power integration technology.