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基于加法器的测试生成,提出了直接实现形式的细粒度流水线延迟最小均方自适应滤波器的一种可测性设计的测试方案。在测试模式下,该设计通过滤波器组成模块的分层隔离及由寄存器转化成的扫描链提高了可测性;通过复用部分寄存器和加法器避免或最小化了额外的测试硬件开销。该方法能在真速下高效地侦测到滤波器基本组成单元内的任意固定型组合失效,且不会降低电路的原有性能。
Based on the adder-based test generation, a testable design scheme of the fine-grained pipeline delay least mean square adaptive filter is proposed. In test mode, the design improves the testability through the hierarchical isolation of the filter component modules and the scan chain converted by the registers; avoiding or minimizing additional test hardware overhead by reusing part of the registers and adders. The method can effectively detect any fixed type combination failure in the basic unit of the filter under true speed without reducing the original performance of the circuit.