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With the development of manufac-ture technology, the multi-level cell (MLC) technique dramatically increases the storage density of NAND flash memory. As the result, cell-to-cell interference (CCI) becomes more serious and hence causes an increase in the raw bit error rate of data stored in the cells. Recently, low-density parity-check (LDPC) codes have appeared to be a promising solu-tion to combat the interference of MLC NAND flash memory. However, the decoding complexity of the sum-product algorithm (SPA) is extremely high. In this paper, to im-prove the accuracy of the log likelihood ratio (LLR) information of each bit in each NAND flash memory cell, we adopt a non-uniform detection (N-UD) which uses the average maximum mutual information to determine the value of the soft-decision reference voltag-es. Furthermore, with an aim to reduce the de-coding complexity and improve the decoding performance, we propose a modified soft reli-ability-based iterative majority-logic decoding (MSRBI-MLGD) algorithm, which uses a non-uniform quantizer based on power func-tion to decode LDPC codes. Simulation results show that our design can offer a desirable trade-off between the performance and com-plexity for high-column-weight LDPC-coded MLC NAND flash memory.