用外延台面工艺,研制了GaAs单片集成电路。结合正性光刻胶的1微米金属剥离技术,快升温合金技术和栅区深腐蚀技术,已研制出平均时延小于0.5毫微秒,平均功耗小于100毫瓦的砷化镓缓冲场效应晶体管逻辑(GaAs—BFL)单片门电路。较好的电路芯片性能,平均时延可小于100微微秒,平均功耗小于50毫瓦。 Using epitaxial mesa technology, GaAs monolithic integrated circuit was developed. A gallium arsenide buffer field effect with an average time delay of less than 0.5 ns and an average power consumption of less than 100 milliwatts has been developed in combination with a 1 micron metal lift-off technique for positive photoresists, a fast warm-up alloy, and a gate etch-down technique Transistor Logic (GaAs-BFL) Monolithic Gate. Better circuit chip performance with an average latency of less than 100 picoseconds and an average power consumption of less than 50 milliwatts.