以对74290IP核加载边界扫描结构为例,采用硬件描述语言Verilog对边界扫描结构进行了模块化设计,并进行了边界扫描测试仿真。结果表明:加载边界扫描结构后的核心逻辑能够实现功能内测试和外部互联测试。该设计方法简单可行,具有一定的通用性,为智能BIT设计、装备健康管理设计中的底层数据采集提供了技术支撑。 Taking the 74290IP nuclear loading boundary-scan structure as an example, the boundary-scan structure is designed by the hardware description language Verilog, and the boundary-scan test simulation is carried out. The results show that the core logic after loading the boundary-scan structure can implement in-function test and external-connection test. The design method is simple and feasible, has a certain versatility, and provides technical support for the underlying data acquisition in intelligent BIT design and equipment health management design.