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用封闭式硅栅结构(C~2L结构)设计和试制了一个低阈值CMOS通用逻辑电路系列。其中包括四位双向移位寄存器、全加器、五种计数器、四种译码器或编码器、三种触发器、二种缓冲器(与TTL接口的电路)以及多种门电路(包含两种三态门在内)的三十九个品种大部分已设计定型,并进入小批量生产的阶段。文中叙述了这种电路的工艺流程、版图设计原则以及给出了工作频率上限、静态功耗、输入漏电电流和工作电源电压范围等参数的实验结果,并对这种电路的优越性进行了讨论。
A closed-gate silicon gate structure (C ~ 2L structure) designed and prototype a low threshold CMOS general logic circuit. These include four bidirectional shift registers, full adders, five counters, four decoders or encoders, three flip-flops, two buffers (circuits with TTL interface), and a variety of gates (including two Most of the thirty-nine species of Kansai) have been designed and put into shape, and enter the stage of small batch production. The article describes the process flow of the circuit, the principle of layout design and the experimental results of parameters such as upper limit of operating frequency, static power consumption, input leakage current and operating power supply voltage range, and discusses the superiority of this circuit .