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正是由于电路封装主要是依靠在芯片上更多的互连。所以它不是象在印刷电路板上作较少的连线。芯片电路和印刷电路继续沿着这种方向达到更高的密度。为了制作这种高密度封装管壳销售厂终于得到了一些可采用的方法,其中有两种值得注意的方法是:四侧引线封装(简称QUIP)和陶瓷方片集成电路载体。 采用LSI大尺寸塑料和陶瓷双列直插式封装(DIP)已经很久了,由JEDEC标准化的尺寸为48腿、64腿的管壳,管脚间隙为0.1吋。但是在1985年以后,超大规模集成电路芯片含有100000个或者更多的半导体器件,这将需要比现在的DIP具
It is precisely because the circuit package is mainly rely on more interconnections on the chip. So it is not like making fewer connections on a printed circuit board. Chip and printed circuits continue to reach higher densities in this direction. In order to make this kind of high-density package tube shell factory finally got some methods that can be used, of which there are two notable ways: four-lead package (referred to as QUIP) and ceramic chip integrated circuit carrier. It has been a long time since LSI large-size plastic and ceramic dual in-line packages (DIPs), standardized by JEDEC, have a 48-leg, 64-leg shell with a 0.1-inch gap. However, since 1985, VLSI chips contain 100,000 or more semiconductor devices, which will require more power than the current DIP