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采用管壳内匹配及外电路匹配相结合的方法,成功制作四胞合成大功率高增益SiCMESFET。优化了芯片装配形式,采用内匹配技术提高了器件输入、输出阻抗。优化了测试电路结构,成功消除了输入信号对栅极偏置电压的影响,提高了电路稳定性。四胞器件在脉宽为300μs、占空比为10%脉冲测试时,2 GHzVds=50 V脉冲输出功率为129 W(51.1 dBm),线性增益为13.0 dB,功率附加效率为31.4%。
Using a combination of tube-in-tube matching and external circuit matching, the successful production of tetragonal synthesis of high-power high-gain SiCMESFET. Optimized chip assembly form, using the internal matching technology to improve the device input and output impedance. Optimized the test circuit structure, the successful elimination of the input signal on the gate bias voltage, improve the circuit stability. The quadruplex device has a pulse power of 129 W (51.1 dBm) at 2 GHz Vds = 50 V and a linear gain of 13.0 dB at a pulse width of 300 μs with a duty cycle of 10%. The additional power efficiency is 31.4%.