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报道了对基本CMOS逻辑单元在25～250℃(结)温度范围内的开关速度性能的研究结果;把两种标准的4μmCMOS工艺制作的电容负载反相器和与非门的实验测量结果,与理论的及SPICE2G6的模拟结果进行了比较。业已发现,把一个简单的表述因子(本研究中在0.004～0.006/℃之间)应用到给定温度下的平均门延迟中,该表述因子可以正确地预示延迟速度这个参数,其进果非常近似;由此得出,逻辑单元在250℃时比在室温下通常慢65％。
The results of the research on the switching speed performance of the basic CMOS logic unit in the temperature range of 25 ~ 250 ℃ (junction) are reported. The experimental results of two kinds of standard load capacitance inverters and NAND gate fabricated with 4μm CMOS technology are compared with Theoretical and SPICE2G6 simulation results were compared. It has been found that applying a simple expression factor (0.004 to 0.006 / ° C in this study) to the average gate delay at a given temperature can correctly predict the parameter of the delay speed and the result is very poor It follows that the logic cell is typically 65% slower at 250 ° C than at room temperature.