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本文介绍了一种基于FPGA与FLASH高速数据采集系统的设计,最高采样频率可达到200MHz,并且具有8位分辨率、低成本、体积小和易控制等优点。在介绍数据采集理论的基础上,提出了系统的功能方案和结构设计,包括器件的选择原则和工作原理及仿真时序等。在此基础上利用VB软件对基于信号完整性的采集板进行了详细的设计仿真,得出合乎信号完整性的结果。最后对系统进行了功能验证。系统在100MHz的频率下能够正常工作,整体设计及完成功能达到高速数据采集系统初样机的要求。
This article introduces a design based on FPGA and FLASH high-speed data acquisition system, the maximum sampling frequency up to 200MHz, and has 8-bit resolution, low cost, small size and easy control. Based on the introduction of data acquisition theory, the functional scheme and structure design of the system are put forward, including the selection principle, working principle and simulation timing of the device. Based on this, VB software was used to simulate the acquisition board based on signal integrity and get the result of signal integrity. Finally, the system has been functional verification. System at 100MHz frequency to work properly, the overall design and complete features to achieve high-speed data acquisition system prototype prototype requirements.