引言作为数字滤波器的基础部件的串联流水线乘法器于1968年由Jackson,kaiser和Lonald[1]首先提出的。该乘法器用小规模和中规模集成数字功能块和用原码表示数的两正数相乘原码表示数的算法。为了使数字滤波器在功耗、成本、尺寸和可靠性方面能与其模拟滤波器相媲美必须进一步提高它的集成度。由于在数字处理机中普遍采用二进制补码表示数,所以需要在原码乘法运算的线路上附加线路去进行原码和补码之间的转换。1973年Lyon[2]提出了串联流水线的乘法器运算方法,它直接利用二进制补码被乘数和二进制补码乘数或者用二进制补码被乘数与原码乘数相乘的算法。设计这样的乘法器片,逻辑上事先必须考虑其通用性,使它不仅能用于专用的贝 Introduction A serial pipelined multiplier, the basis of digital filters, was first proposed by Jackson, Kaiser and Lonald [1] in 1968. The multiplier uses an algorithm for small-scale and medium-scale integration of digital blocks and multiplication of the original code representation by two positive numbers representing the number of the original code. To make digital filters comparable in power, cost, size, and reliability to their analog filters, its integration must be further enhanced. As digital processors generally use two’s complement representation, so you need to add lines in the original code multiplication operation to convert between the original code and the complement. In 1973, Lyon [2] proposed a multiplier operation method for a cascaded pipeline by directly multiplying the two’s complement multiplicand and the two’s complement multiplier, or multiplying the two’s complement multiplier by the original multiplier. Designing such a multiplier slice, the logic must first consider its versatility so that it can be used not only for special shellfish