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针对传统半导体设计流程中对MCU芯片进行功能性验证时涉及到多个芯片之间的互联,手工操作连接十分烦琐且易出现错误,介绍了一种基于FPGA的MCU引脚自动互联的设计与实现。介绍了MCU模块功能性验证自动化实现的概念,从硬件逻辑角度给出了一种解决方法,并且从FPGA模块设计、功能仿真和系统实现等方面,证明了新的测试方法不但降低了人为操作错误的可能性,而且提高了模块功能验证的覆盖率和验证效率,大大缩短了产品的上市时间。
Aiming at the functional verification of MCU chip in the traditional semiconductor design flow, the interconnection between multiple chips is involved. The manual operation connection is cumbersome and prone to errors. The design and implementation of an FPGA-based MCU pin interconnection . This paper introduces the concept of automatization of functional verification of MCU module and presents a solution from hardware logic perspective. It also proves that the new test method not only reduces human error in the operation of FPGA module design, functional simulation and system implementation, The possibility of improving the coverage of the functional verification of the module and the verification efficiency greatly shorten the time-to-market of the product.