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为了降低基带处理器的硬件复杂度以减少系统的成本,该文提出了一种适用于IEEE802.11b的基带处理器设计。重点描述了捕获、同步以及补偿码键控(CCK)解调方法。在捕获和同步过程中,采用了天线锁定技术,并且利用一种特殊转置结构的相关器完成了信号检测功能。CCK解调器包含快速Walsh变换(FWT)结构和符号判决单元,采用了一种新的算法和结构,降低了硬件复杂度。该芯片采用TSMC公司的0.25μm逻辑CMOS工艺设计,等效门数为32万门,版图面积为13mm2,仿真验证表明新的设计降低了硬件复杂度。
In order to reduce the hardware complexity of the baseband processor to reduce the system cost, a baseband processor design suitable for IEEE802.11b is proposed. The capture, synchronization, and compensation code keying (CCK) demodulation methods are highlighted. In the capture and synchronization process, the use of the antenna locking technology, and the use of a special transpose structure of the correlator to complete the signal detection. The CCK demodulator contains a fast Walsh Transform (FWT) structure and symbol decision unit, using a new algorithm and structure that reduces hardware complexity. The chip uses TSMC’s 0.25μm logic CMOS process design, the equivalent gate number of 320,000, the layout area of 13mm2, simulation shows that the new design reduces the hardware complexity.