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这种直接耦合的绝对值电路具有低输入偏流、高输入阻抗和驱动2.5V(50Ω负载)的能力.晶体管Q1对输入进行缓冲来得到高输入阻抗,并通过R_(10).偏移输入电平,以便与大电流增益晶体管Q2以及R_4、R_7、R_8、R_9和R_(11)组成的单位增益例相器的输入相匹配.输入偏流通过R_1和R_2,而不流经输入源.在正输入电压时,Q1、Q3上R_3和R_(10).形成一个零偏置电压跟随器.而倒相器使Q4截止.在负输入电压时,Q3截止,而倒相器通过Q4驱动输出,以至Vout=|Vin|.
This directly coupled absolute value circuit has low input bias current, high input impedance and the ability to drive a 2.5V (50Ω load). Transistor Q1 buffers the input for high input impedance and shifts the input current through R_ (10) Level to match the input of the high-current gain transistor Q2 and the unity-gain phase-changer consisting of R_4, R_7, R_8, R_9 and R_ 11. The input bias current passes through R_1 and R_2 without flowing through the input source. At the input voltage, R_3 and R_ (10) on Q1 and Q3 form a zero-bias voltage follower, and the inverter turns Q4 off. At the negative input voltage, Q3 turns off and the inverter drives its output through Q4, As well as Vout = | Vin |.