目前短沟道CMOS 环振的瞬态分析和模拟不能令人满意,对于长沟道CMOS 环振通常用SPICE 进行模拟,在短沟道情况下则需要对器件模型和参数进行修正。使用载流子总量方法进行模拟,结果得到一些减小CMOS 电路传输延迟时间的设计方法,利用这些方法设计和制造了几种短沟道CMOS 环振电路.已知,热电子产生会限制器件的等比例缩小,在漏区附近受到电场加速的电子可获得足够的能量发生碰撞电离,从而产生电子-空穴对.空穴流入衬底产生衬底电流,轻掺杂漏和埋沟结构的应用可以改善由此引起的器件特性变坏.本文描述一种基于衬底电流分析的二维模拟方法以提高MOS At present, the transient analysis and simulation of short-channel CMOS ring oscillator are unsatisfactory. For long-channel CMOS ring oscillator, SPICE is usually used to simulate it. In the case of short channel, the device model and parameters need to be modified. Using the method of carrier quantity simulation, we get some design methods to reduce the propagation delay time of CMOS circuits, and use these methods to design and manufacture several short-channel CMOS ring oscillator circuits. It is known that the generation of thermoelectric electrons will limit the device , The electrons accelerated by the electric field in the vicinity of the drain region can obtain enough energy to collide and ionize so as to generate electron-hole pairs. The holes flow into the substrate to generate substrate current, lightly doped drain and buried-channel structure Application can improve the resulting deterioration of device characteristics.This paper describes a two-dimensional simulation method based on substrate current analysis to improve the MOS