论文部分内容阅读
针对微弱重力信号测量中加速度计的数字输出接口电路应具有高分辨率的问题,引入了开关电容(SC)sigma-delta调制器(SDM).基于SDM的工作原理和拓扑结构,分析了过采样比、内部量化器位数以及级联结构对提高微弱信号检测精度的影响,设计了满足加速度计接口电路高分辨率要求的理想二阶1位低失真SDM结构.通过研究各模块在SC电路实现中的非理想特性及其对电路功耗的影响,设计了基于不同带宽的低功耗SDM实现参数,给出了相应的功耗估计.利用Simulink对各设计方案进行了时域的行为级仿真.结果表明,所设计SDM在低功耗的前提下其分辨率可达21位以上,其电路实现参数可用于指导晶体管级电路设计.
The digital output interface circuit of the accelerometer in weak gravity signal measurement should have high resolution, and introduce a switched-capacitor (SC) sigma-delta modulator (SDM). Based on the working principle and topological structure of SDM, Ratio, the number of internal quantizer and the effect of cascaded structure to improve the detection accuracy of weak signal, an ideal second-order 1-bit low-distortion SDM architecture is designed to meet the high-resolution requirements of accelerometer interface circuit.Through the study of the implementation of each module in the SC circuit In the non-ideal characteristics and its impact on circuit power consumption, designed based on different bandwidth low-power SDM implementation parameters, the corresponding power estimation is given.Using Simulink on the design of the time-domain behavioral simulation The result shows that the designed SDM can reach more than 21 bits with low power consumption and the circuit realization parameters can be used to guide the design of transistor - level circuit.