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硅外延一直用于双极电路,在高阻P 型衬底上生长一层高阻N 型外延层,起元件之间的隔离作用。为了减小集电极的串联电阻,在衬底的局部地区形成低阻N~+ 埋层岛,然后再生长N 型外延层。随着双极电路的集成度和速度的不断提高,要求薄而均匀的外延层,以提高截止频率和缩短传递延迟时间。MOS 集成电路用自隔离措施,因此一般不用外延层结构。但新近在设计高速度和高集成度NMOS 器件时,为了提高速度,减小寄生电容,采用P 型高阻(40—60Ω·cm)的单品硅。直拉单晶由于氧施主的存在而引起电阻率的不稳定,严重时出现反型。为了解决高阻材料问题,在低阻衬底上生长导电类型相同的高阻外延层,其中不仅没有间隙氧的存在,而且还可以得到比衬底更完整的晶体。如在制造64k DRAM 和256k
Silicon epitaxy has been used in bipolar circuits to grow a high-resistance, N-type epitaxial layer on a high-resistance P-type substrate to act as a spacer between components. In order to reduce the series resistance of the collector, a low-resistance N ~ + buried island is formed in a part of the substrate, and then an N-type epitaxial layer is grown. As bipolar circuits become more integrated and faster, thin and uniform epitaxial layers are required to increase the cut-off frequency and to shorten the transfer delay. MOS integrated circuits with self-isolation measures, it is generally not the epitaxial layer structure. However, in the recent design of high-speed and highly integrated NMOS devices, in order to increase the speed and reduce the parasitic capacitance, the use of P-type high resistance (40-60Ω · cm) of a single silicon. Czochralski crystal instability due to the presence of oxygen donor caused resistivity, serious anti-type. In order to solve the problem of high-resistance materials, a high-resistance epitaxial layer of the same conductivity type is grown on a low-resistance substrate, in which not only there is no interstitial oxygen but also a more complete crystal than the substrate. As in the manufacture of 64k DRAM and 256k