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《电世界》1991年第6期介绍的数字钟可编程时间顺序控制器在设计上有其独到之处,尤其是它采用了时间快调电路、电源升压电路,以及选用了CMOS静态RAM,使电路功能得到提高和扩展,对启迪思维和开发产品都很有教益。不足之处是该设计采用的时基电路稍嫌繁琐,现根据本人实践,提出3种较简单的改进方案,供有兴趣的读者参考。电路方案一将原文附图时基电路中的振荡晶体A由32768Hz改选为30720Hz。这样经CD4060九分频后,刚好得到60Hz的时基信号可供LM8361使用。原文中将
“Digital World” No. 6, 1991 introduction of the digital clock programmable sequence controller has its own unique design, in particular, it uses a time-fast circuit, power supply boost circuit, and the selection of CMOS static RAM, So that the circuit function is improved and expanded, to inspire thinking and developing products are very instructive. The downside is that the time-base circuit used in the design is a bit cumbersome. According to my own practice, I propose three simpler improvement proposals for readers’ reference. Circuit A program of the original figure in the oscillation circuit of the crystal oscillator A from 32768Hz re-elected to 30720Hz. This CD4060 nine-way frequency, just got 60Hz time base signal for LM8361 use. The original text will