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在实践中我们认识到单晶材料的电阻率与中规模MOS电路的成品率有很大关系。现简单分析如下: 关键是L′,如图1所示。 设沟道的几何尺寸为L,扩散结深为x_j,器件处于饱和状态时漏附近的耗尽层宽度为x_m,则沟道的有效长度为: L′=L-2x_j-x_m (1) 我们知道:当栅压|V_(GS)|>V_T时,栅下面的硅表面将由N型变为P型(对P沟道而言),这个P型层就是所谓沟道。沟道与衬底所形成的结称感应结。因沟道的厚度很薄,所以感应结为突变结。由突变结的耗尽层公式可得:
In practice, we have realized that the resistivity of single crystal materials has a great relationship with the yield of medium-scale MOS circuits. Now a simple analysis as follows: The key is L ', as shown in Figure 1. Let the channel geometry L, diffusion junction depth x_j, the device is in saturation when the depletion layer near the drain width x_m, the effective channel length is: L '= L-2x_j-x_m (1) We Knowing: When the gate voltage | V_ (GS) |> V_T, the silicon surface beneath the gate will change from N-type to P-type (for P-channel), which is the so-called channel. Trench and substrate formed by the junction of inductive junction. Due to the channel thickness is thin, so induction knot mutation. From the depletion layer of the mutant junction formula can be obtained: